Comparison ledger
EV Group 101, Laurell SU-8, side by side. Every value shown is drawn from the cited encyclopedia entries.
| Attribute | 101EV Group | SU-8Laurell |
|---|---|---|
| OEM | EV Group | Laurell |
| Category | Lithography | Lithography |
| Wafer size | — | — |
| Process node | — | — |
| Introduced | — | — |
| Production run | — | — |
| Lifecycle | — | — |
| Lifecycle milestones | — | — |
| Control system | — | — |
| Generation | — | — |
| Family | EV Group 101 | Laurell SU-8 |
| Specifications | ||
| OEM | EV Group[1] | — |
| Model | 101[1] | — |
| Equipment name | EVG 101 Spray Coater[1] | Spin Station- Laurell- SU-8 ONLY[4] |
| NEMO ID | evgspraycoat[1] | — |
| Training required | EVG 101 Training[1] | — |
| Training duration | 1.50 hours[1] | — |
| Processing technique | Resist Spray Coat (manual)[1] | — |
| Cleanliness | "All"[1] | — |
| Location | SNF Paul G Allen L107 Cleanroom[1] | — |
| Wafer diameter (substrate size) | up to 300 mm[2] | — |
| Available modules | Spin coat / OmniSpray® / develop[2] | — |
| Wafer handling options | Bowed / warped / thin wafer handling, edge handling[2] | — |
| Dispense options | Various resist dispense pumps covering viscosities up to 52000 cP; constant pressure dispense systems; EBR / BSR / pre-wet / bowl wash / liquid priming[2] | — |
| Processing technique (at SNF) | Resist Spray Coat (manual)[3] | — |
| Cleanliness group (at SNF) | "All"[1] | — |
| Category | — | Lithography[4] |
| Type | — | Spin station[4] |
| Photoresist Type | — | SU-8 (negative epoxy photoresist)[5] |
| Exposure Wavelength | — | i-line (365 nm)[5] |
| Maximum Absorption | — | Ultraviolet light at 365 nm[5] |
| Film Thickness Range (single spin coat) | — | 1 to >200 μm[6] |
| Maximum Film Thickness (multiple coats or dry film) | — | Up to above 300 μm (spun) or above 1 mm (dry film)[5] |
| Aspect Ratio (achieved) | — | >20 with solution formulation; >40 with dry resist[5] |
| Operational Mode | — | Dedicated to SU-8 only[4] |
| Spin Speed (recommended for reproducibility) | — | 3000 rpm[7] |
| Soft Bake Temperature (typical first step) | — | 65 °C[6] |
| Soft Bake Temperature (typical second step) | — | 95 °C[6] |
| Post Exposure Bake Temperature (first step) | — | 65 °C[6] |
| Post Exposure Bake Temperature (second step) | — | 95 °C[6] |
| Hard Bake Temperature (optional) | — | 150 °C[8] |
| Developer | — | 1-methoxy-2-propanol acetate (PGMEA) or SU-8 Developer[5] |
| Substrate Size (example used in research) | — | 150 mm (6-inch) silicon wafer[9] |
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